This page is read only. You can view the source, but not change it. Ask your administrator if you think this is wrong.
~ ~ NOTOC~ ~
Configure the specified SPI channel.
If the LINX device has a single SPI master it is channel 0. If the LINX device has more than one SPI master the logical first SPI master is channel 0, the next is channel 1, etc.
<b>Clock Frequency</b> specifies the desired SPI clock frequency. Since supported clock frequencies vary by device, the highest supported frequency that is less than or equal to the specified frequency is used. The actual frequency used is returned. <b>Bit Order</b> specifies the order that the bits are shifted out. LSb for least significant bit first, MSb for most significant bit first. <b>SPI Mode</b>specifies the SPI mode which set the clock phase and polarity.
SPI Mode: Chose the SPI mode to determine the clock idle value and sampling edge as follows: Mode 0 - Clock idle low; data sampled on rising edge. Mode 1 - Clock idle low; data sampled on faling edge. Mode 2 - Clock idle high; data sampled on faling edge. Mode 3 - Clock idle high; data sampled on rising edge.
SPI Channel (0) Specifies the SPI channel to configure. If the LINX device has a single SPI master it is channel 0. If the LINX device has more than one SPI master the logical first SPI master is channel 0, the next is channel 1, etc.
LINX Resource Contains LINX connection resources.
SPI Configuration Specifies the SPI master configuration.
Error In Describes error conditions that occur before this node runs. This input provides standard error in functionality.
Actual Clock Frequency Returns the actual SPI clock frequency used (the supported clock frequencies between LINX devices).
Error Out Contains error information. This output provides standard error out functionality.
SPI Open SPI Write Read 1 Frame SPI Write Read N Frames LINX VI Reference